index - Equipe Secure and Safe Hardware Accéder directement au contenu

 

Dernières publications

Mots clés

GSM Simulation Application-specific VLSI designs Side-channel attack Random access memory 3G mobile communication Side-Channel Analysis SCA Logic gates AES Machine learning Hardware FPGA Robustness Signal processing algorithms Switches Side-channel attacks Asynchronous Dual-rail with Precharge Logic DPL Resistance Defect modeling Formal proof Receivers Coq STT-MRAM Spin transfer torque Electromagnetic DRAM Confusion coefficient Differential power analysis DPA Filtering Dynamic range Process variation Reverse-engineering Reverse engineering Steadiness Side-Channel Analysis OCaml Field programmable gate arrays Intrusion detection Energy consumption Training Temperature sensors SCA RSA Transistors Masking Costs Hardware security Masking countermeasure Countermeasure Protocols Loop PUF Formal methods Field Programmable Gates Array FPGA Neural networks ASIC Sensors Convolution Writing FDSOI Elliptic curve cryptography Side-Channel Attacks CRT PUF Sécurité TRNG CPA Countermeasures Security and privacy Mutual Information Analysis MIA Fault injection Power-constant logic Cryptography Side-channel attacks SCA MRAM Authentication Fault injection attack Magnetic tunnel junction Tunneling magnetoresistance Voltage Differential Power Analysis DPA Internet of Things Security Computational modeling Routing Information leakage SoC Image processing Circuit faults Reliability Magnetic tunneling Aging Lightweight cryptography Variance-based Power Attack VPA Linearity Estimation Side-channel analysis Power demand Security services Randomness

 

Documents avec texte intégral

211

Références bibliographiques

428

Open access

39 %

Collaborations